MOSFET Models (NMOS/PMOS) |

The model of the MOSFET is identified by the type specifier NMOS or PMOS.

.MODEL <model name> NMOS [model parameters] .MODEL <model name> PMOS [model parameters] |

SPICE provides four MOSFET device models, which differ in the formulation of the I-V characteristic. The variable LEVEL specifies the model to be used:

- LEVEL=1 Shichman-Hodges
- LEVEL=2 MOS2
- LEVEL=3 MOS3, a semi-empirical model
- LEVEL=4 BSIM1
- LEVEL=5 BSIM2
- LEVEL=6 MOS6

The dc characteristics of the level 1 through level 3 MOSFETs are defined by the device parameters VTO, KP, LAMBDA, PHI and GAMMA. These parameters are computed by SPICE if process parameters (NSUB, TOX, ...) are given, but user-specified values always override. VTO is positive (negative) for enhancement mode and negative (positive) for depletion mode N-channel (P-channel) devices.

Charge storage is modeled by three constant capacitors, CGSO, CGDO, and CGBO which represent overlap capacitances, by the nonlinear thin-oxide capacitance which is distributed among the gate, source, drain, and bulk regions, and by the nonlinear depletion-layer capacitances for both substrate junctions divided into bottom and periphery, which vary as the MJ and MJSW power of junction voltage respectively, and are determined by the parameters CBD, CBS, CJ, CJSW, MJ, MJSW and PB. Charge storage effects are modeled by the piecewise linear voltages-dependent capacitance model proposed by Meyer. The thin-oxide charge-storage effects are treated slightly different for the LEVEL=1 model. These voltage-dependent capacitances are included only if TOX is specified in the input description and they are represented using Meyer's formulation.

There is some overlap among the parameters describing the junctions, e.g. the reverse current can be input either as IS (in A) or as JS (in A/m2). Whereas the first is an absolute value the second is multiplied by AD and AS to give the reverse current of the drain and source junctions respectively. This methodology has been chosen since there is no sense in relating always junction characteristics with AD and AS entered on the device line; the areas can be defaulted. The same idea applies also to the zero-bias junction capacitances CBD and CBS (in F) on one hand, and CJ (in F/m2) on the other.

The parasitic drain and source series resistance can be expressed as either RD and RS (in ohms) or RSH (in ohms/sq.), the latter being multiplied by the number of squares NRD and NRS input on the device line.

A discontinuity in the MOS level 3 model with respect to the KAPPA parameter has been detected. The supplied fix has been implemented in Spice3f2 and later. Since this fix may affect parameter fitting, the option "BADMOS3" may be set to use the old implementation (see the section on simulation variables and the " .OPTIONS " line).

Parameter | Description | Units | Default | Example |

LEVEL | model index | 1 | ||

VTO | zero-bias threshold voltage (V_{T0}) |
V | 0.0 | 1.0 |

KP | transconductance parameter | A/V^{2} |
2.0e-5 | 3.1e-5 |

GAMMA | bulk threshold parameter (у) | V^{1/2} |
0.0 | 0.37 |

PHI | surface potential (Φ) | V | 0.6 | 0.65 |

LAMBDA | channel-length modulation (MOS1 and MOS2 only) (λ) | 1/V | 0.0 | 0.02 |

RD | drain ohmic resistance | Ω | 0.0 | 1.0 |

RS | source ohmic resistance | Ω | 0.0 | 1.0 |

CBD | zero-bias B-D junction capacitance | F | 0.0 | 20fF |

CBS | zero-bias B-S junction capacitance | F | 0.0 | 20fF |

IS | bulk junction saturation current (I_{S}) |
A | 1.0e-14 | 1.0e-15 |

PB | bulk junction potential | V | 0.8 | 0.87 |

CGSO | gate-source overlap capacitance per meter channel width | F/m | 0.0 | 4.0e-11 |

CGDO | gate-drain overlap capacitance per meter channel width | F/m | 0.0 | 4.0e-11 |

CGBO | gate-bulk overlap capacitance per meter channel length | F/m | 0.0 | 2.0e-10 |

RSH | drain and source diffusion sheet resistance | Ω/q | 0.0 | 10.0 |

CJ | zero-bias bulk junction bottom cap. per sq-meter of junction area | F/m^{2} |
0.0 | 2.0e-4 |

MJ | bulk junction bottom grading coefficient | 0.5 | 0.5 | |

CJSW | zero-bias bulk junction sidewall cap. per meter of junction perimeter | F/m | 0.0 | 1.0e-9 |

MJSW | bulk junction sidewall grading coefficient | 0.50(level1) 0.33(level2,3) |
||

JS | bulk junction saturation current per sq-meter of junction area | A/m^{2} |
0 | 1.0e-8 |

TOX | oxide thickness | m | 1.0e-7 | 1.0e-7 |

NSUB | substrate doping | 1/cm^{3} |
0.0 | 4.0e15 |

NSS | surface state density | 1/cm^{2} |
0.0 | 1.0e10 |

NFS | fast surface state density | 1/cm^{2} |
0.0 | 1.0e10 |

TPG | type of gate material: +1 opp. to substrate -1 same as substrate 0 Al gate. |
1.0 | ||

XJ | metallurgical junction depth | m | 0.0 | 1µ |

LD | lateral diffusion | m | 0.0 | 0.8µ |

UO | surface mobility | cm^{2}/Vs |
600 | 700 |

UCRIT | critical field for mobility degradation (MOS2 only) | V/cm | 1.0e4 | 1.0e4 |

UEXP | critical field exponent in mobility degradation (MOS2 only) | 0.0 | 0.1 | |

UTRA | transverse field coeff. (mobility) (deleted for MOS2) | 0.0 | 0.3 | |

VMAX | maximum drift velocity of carriers | m/s | 0.0 | 5.0e4 |

NEFF | total channel-charge (fixed and mobile) coefficient (MOS2 only) | 1.0 | 5.0 | |

KF | flicker noise coefficient | 0.0 | 1.0e-26 | |

AF | flicker noise exponent | 1.0 | 1.2 | |

FC | coefficient for forward-bias depletion capacitance formula | 0.5 | ||

DELTA | width effect on threshold voltage (MOS2 and MOS3) | 0.0 | 1.0 | |

THETA | mobility modulation (MOS3 only) | 1/V | 0.0 | 0.1 |

ETA | static feedback (MOS3 only) | 0.0 | 1.0 | |

KAPPA | saturation field factor (MOS3 only) | 0.2 | 0.5 | |

TNOM | Temperature at which the model parameters were measured. If this value is specified overrides the nominal TNOM value which is set in the options. | °C | 50 |

```
.MODEL MDEFAULT NMOS
.MODEL MMOD PMOS ( VTO=1 LAMBDA=0.005 TOX=0.1u )
```