Open-collector

The digital open-collector is a simple open collector gate. The state seen on the input line is reflected in the output. The state seen on the input line determines the strength of the output. If the input to this device is a 1 then the output is a 1, with a HI_IMPEDANCE strength. If the input is a 0, then the output is a STRONG 0, otherwise, the output strength is UNDETERMINED. The falling (fall_delay) and rising (open_delay) delays may be specified independently.

Port Table

Description Direction Default Type Allowed Types Vector Vector Bounds Null Allowed
Input IN d d NO   NO
Output OUT d d NO   NO

Parameter Table

Name Description Data Type Default Value Limits Vector Vector Bounds Null Allowed
open_delay open delay Real 1.0e-9 1.0e-12 / - NO   YES
fall_delay fall delay Real 1.0e-9 1.0e-12 / - NO   YES
input_load input load value (F) Real 1.0e-12   NO   YES

Example

a9 1 2 openc1
  
.model openc1 d_open_c(open_delay = 0.5e-9 fall_delay = 0.5e-9 input_load = 0.5e-12)

See also

XSPICE Devices
XSPICE Code Models