| DAC_BRIDGE |
Digital-to-Analog Node Bridge
The dac_bridge is the first of two node bridge devices designed to allow for
the ready transfer of digital information to analog values and back again.
The second device is the adc_bridge (which takes an analog value and maps it
to a digital one).
The dac_bridge takes as input a digital value
from a digital node. This value by definition may take on only one of the
values "0", "1" or "U". The dac_bridge then outputs the value "out_Low",
"out_high" or "out_undef", or ramps linearly toward one of these "final"
values from its current analog output level. The speed at which this ramping
occurs depends on the values of "t_rise" and "t_fall". These parameters are
interpreted by the model such that the rise or fall slope generated is
always constant.
Note: Note that the dac_bridge includes
test code for determining the presence of the out_undef parameter. If
this parameter is not specified by you, and if out_high and out_low
values are specified, then out_undef is assigned the value of the
arithmetic mean of out_high and out_low. This simplifies coding of
output buffers, where typically a logic family will include an out_low
and out_high voltage, but not an out_undef value.
This model
also posts an input load value (in farads) based on the parameter
input_load.
| Description | Direction | Default Type | Allowed Types | Vector | Vector Bounds | Null Allowed |
| Input | IN | d | d | YES | NO | |
| Output | OUT | v | v,vd,i,id | YES | NO |
| Name | Description | Data Type | Default Value | Limits | Vector | Vector Bounds | Null Allowed |
| out_low | analog output for 'ZERO' digital input | Real | 0.0 | NO | YES | ||
| out_high | analog output for 'ONE' digital input | Real | 1.0 | NO | YES | ||
| out_undef | analog output for 'UNDEFINED' digital input | Real | 0.5 | NO | YES | ||
| input_load | capacitive input load (F) | Real | 1.0e-12 | NO | YES | ||
| t_rise | rise time 0 -> 1 | Real | 1.0e-9 | 1e-12 / - | NO | YES | |
| t_fall | fall time 1 -> 0 | Real | 1.0e-9 | 1e-12 / - | NO | YES |
abridge1 7 2 dacl
.model dacl dac.bridge(out.low = 0.7 out.high = 3.5 out.undef = 2.2
+ input_load = 5.Oe-12 t.rise = 50e-9 f.fall = 20e-9)